LPC2148 – Introduction

Hi All… Today we are going to see the LPC2148 ARM7 Introduction. Let’s start.

LPC2148 ARM7 Introduction

ARM

ARM generally known as Advanced RISC Machine is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by British company ARM Holdings. The ARM architecture is the most widely used 32-bit instruction set architecture in numbers produced.

In 2005 about 98% of the more than one billion mobile phones sold each year used at least one ARM processor. In 2009 ARM processors accounted for approximately 90% of all embedded 32-bit RISC processorsand were used extensively in consumer electronics, including personal digital assistants (PDAs), tablets, mobile phones, digital media and music players, hand-held game consoles, calculators and computer peripherals such as hard drives and routers.

VERSION OF ARM

Architecture

Family

ARMv1

ARM 1

ARMv2

ARM 2, ARM 3

ARMv3

ARM 6, ARM 7

ARMv4

StrongARM, ARM7TDMI, ARM9TDMI

ARMv5

ARM7EJ, ARM9E, ARM10E, Xscale

ARMv6

ARM11,ARM Cortex-M

ARMv7

ARM Cortex-A, ARM Cortex-M, ARM Cortex-R

ARMv8

64 bit data and addressing

ARM 7 TDMI

LPC2000 is a series of 32-bit microcontrollers from NXP Semiconductors. They are based on a 1.8 V ARM7TDMI-S core operating at up to 80 MHz together with a variety of peripherals including serial interfaces, 10-bit ADC/DAC, timers, capture compare, PWM, USB interface, and external bus options. Flash memory ranges from 32 kB to 512 kB RAM ranges from 4 kB to 96 kB.

The LPC214X is a series like LPC2141, LPC2142, LPC2144, LPC2146, and LPC2148 are full-speed USB 2.0 devices in LQFP64 packages. Multiple peripherals are supported including one or two 10-bit ADCs and an optional 10-bit DAC.

The LPC213X series are LPC2364/66/68 and the LPC2378 are full-speed USB 2.0 devices with 2 CAN interfaces and 10/100 Ethernet MAC in LQFP100 andLQFP144 packages. Multiple peripherals are supported including a 10-bit 8-channel ADC and a 10-bit DAC.

LPC2148

The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combine the microcontroller with embedded high-speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide memory interface and unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. Due to their tiny size and low power consumption, LPC2141/42/44/46/48 are ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. Serial communications interfaces ranging from a USB 2.0 Full-speed device, multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM of 8 kB up to 40 kB, make these devices very well suited for communication gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both large buffer size and high processing power. Various 32-bit timers, single or dual 10-bit ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these microcontrollers suitable for industrial control and medical systems.

Features

  • 16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.

  • 8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory.128-bit wide interface/accelerator enables high-speed 60 MHz operation.

  • In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot loader software.

  • Single flash sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms.

  • Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip Real Monitor software and high-speed tracing of instruction execution.

  • USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM. In addition, the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA.

  • One or two (LPC2141/42 vs. LPC2144/46/48) 10-bit ADCs provide a total of 6/14 analog inputs, with conversion times as low as 2.44 μs per channel.

  • Single 10-bit DAC provides variable analog output (LPC2142/44/46/48 only).

  • Two 32-bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog.

  • Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.

  • Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s),

  • SPI and SSP with buffering and variable data length capabilities.

  • Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.

  • Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.

  • Up to 21 external interrupt pins available.

  • 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 μs.

  • On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz

  • Power saving modes include idle and Power-down.

  • Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization.

  • Processor wake-up from Power-down mode via external interrupt or BOD.

  • Single power supply chip with POR and BOD circuits CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.

BLOCK DIAGRAM

a-1 LPC2148 - Introduction

PIN DIAGRAM

a-2 LPC2148 - Introduction

PIN DESCRIPTION

Here,           I/O    –   Input/Output

O     –  Output

I       –  Input

Port 0

Port 0 is a 32-bit I/O port with individual direction controls for each bit. Total of 31 pins of the Port 0 can be used as a general purpose bidirectional digital I/Os while P0.31 is output only pin. The operation of port 0 pins depends upon the pin function selected via the pin connect block. Pins P0.24, P0.26 and P0.27 are not available.

P0.0/TXD0/PWM1-19th pin

I/O     P0.0 — General purpose input/output digital pin (GPIO).

O         TXD0 — Transmitter output for UART0.

O         PWM1 — Pulse Width Modulator output 1.

P0.1/RXD0/PWM3/EINT0-21st pin 

I/O      P0.1 — General purpose input/output digital pin (GPIO).

I           RXD0 — Receiver input for UART0.

O          PWM3 — Pulse Width Modulator output 3.

I            EINT0 — External interrupt 0 input.

P0.2/SCL0/CAP0.0-22nd pin

I/O       P0.2 — General purpose input/output digital pin (GPIO).

I/O       SCL0 — I2C0 clock input/output. Open-drain output (for I2C-bus compliance).

I            CAP0.0 — Capture input for Timer 0, channel 0.

P0.3/SDA0/MAT0.0/EINT1-26th pin

I/O        P0.3 — General purpose input/output digital pin (GPIO).

I/O        SDA0 — I2C0 data input/output. Open-drain output (for I2C-bus compliance).

O            MAT0.0 — Match output for Timer 0, channel 0.

I             EINT1 — External interrupt 1 input.

P0.4/SCK0/CAP0.1/AD0.6-27th pin

I/O        P0.4 — General purpose input/output digital pin (GPIO).

I/O        SCK0 — Serial clock for SPI0. SPI clock output from master or input to slave.

I             CAP0.1 — Capture input for Timer 0, channel 1.

I             AD0.6 — ADC 0, input 6.

P0.5/MISO0/MAT0.1/AD0.7-29th pin

I/O        P0.5 — General purpose input/output digital pin (GPIO).

I/O        MISO0 — Master In Slave Out for SPI0. Data input to SPI master or data output from SPI slave.

O            MAT0.1 — Match output for Timer 0, channel 1.

I             AD0.7 — ADC 0, input 7.

P0.6/MOSI0/CAP0.2/AD1.0-30th pin

I/O        P0.6 — General purpose input/output digital pin (GPIO).

I/O        MOSI0 — Master Out Slave In for SPI0. Data output from SPI master or data input to SPI slave.

I              CAP0.2 — Capture input for Timer 0, channel 2.

I              AD1.0 — ADC 1, input 0. Available in LPC2144/46/48 only.

P0.7/SSEL0/PWM2/EINT2-31st pin

I/O         P0.7 — General purpose input/output digital pin (GPIO).

I              SSEL0 — Slave Select for SPI0. Selects the SPI interface as a slave.

O             PWM2 — Pulse Width Modulator output 2.

I              EINT2 — External interrupt 2 input.

P0.8/TXD1/PWM4/AD1.1-33rd pin

I/O         P0.8 — General purpose input/output digital pin (GPIO).

O             TXD1 — Transmitter output for UART1.

O             PWM4 — Pulse Width Modulator output 4.

I               AD1.1 — ADC 1, input 1. Available in LPC2144/46/48 only.

P0.9/RXD1/PWM6/EINT3-34th pin

I/O          P0.9 — General purpose input/output digital pin (GPIO).

I               RXD1 — Receiver input for UART1.

O              PWM6 — Pulse Width Modulator output 6.

I               EINT3 — External interrupt 3 input.

P0.10/RTS1/CAP1.0/AD1.2- 35th pin

I/O          P0.10 — General purpose input/output digital pin (GPIO).

O              RTS1 — Request to Send output for UART1. LPC2144/46/48 only.

I                CAP1.0 — Capture input for Timer 1, channel 0.

I                AD1.2 — ADC 1, input 2. Available in LPC2144/46/48 only.

P0.11/CTS1/CAP1.1/SCL1-37th pin

I/O           P0.11 — General purpose input/output digital pin (GPIO).

I                CTS1 — Clear to Send input for UART1. Available in LPC2144/46/48 only.

I                CAP1.1 — Capture input for Timer 1, channel 1.

I/O           SCL1 — I2C1 clock input/output. Open-drain output (for I2C-bus compliance)

P0.12/DSR1/MAT1.0/AD1.3-38th pin

I/O           P0.12 — General purpose input/output digital pin (GPIO).

I                DSR1 — Data Set Ready input for UART1. Available in LPC2144/46/48 only.

O               MAT1.0 — Match output for Timer 1, channel 0.

I                 AD1.3 — ADC 1 input 3. Available in LPC2144/46/48 only.

P0.13/DTR1/MAT1.1/AD1.4-39th pin

I/O           P0.13 — General purpose input/output digital pin (GPIO).

O               DTR1 — Data Terminal Ready output for UART1. LPC2144/46/48 only.

O                MAT1.1 — Match output for Timer 1, channel 1.

I                 AD1.4 — ADC 1 input 4. Available in LPC2144/46/48 only.

P0.14/DCD1/EINT1/SDA1-41st pin

I/O            P0.14 — General purpose input/output digital pin (GPIO).

I                 DCD1 — Data Carrier Detect input for UART1. LPC2144/46/48 only.

I                EINT1 — External interrupt 1 input.

I/O            SDA1 — I2C1 data input/output. Open-drain output (for I2C-bus compliance).

Note: LOW on this pin while RESET is LOW forces on-chip boot loader to take over control of the part after reset

P0.15/RI1/EINT2/AD1.5-45th pin

I/O           P0.15 — General purpose input/output digital pin (GPIO).

I                RI1 — Ring Indicator input for UART1. Available in LPC2144/46/48 only.

I                EINT2 — External interrupt 2 input.

I                AD1.5 — ADC 1, input 5. Available in LPC2144/46/48 only.

P0.16/EINT0/MAT0.2/CAP0.2- 46th pin

I/O           P0.16 — General purpose input/output digital pin (GPIO).

I                EINT0 — External interrupt 0 input.

O               MAT0.2 — Match output for Timer 0, channel 2.

I                 CAP0.2 — Capture input for Timer 0, channel 2.

P0.17/CAP1.2/SCK1/MAT1.2-47th pin

I/O            P0.17 — General purpose input/output digital pin (GPIO).

I                 CAP1.2 — Capture input for Timer 1, channel 2.

I/O            SCK1 — Serial Clock for SSP. Clock output from master or input to slave.

O                MAT1.2 — Match output for Timer 1, channel 2.

P0.18/CAP1.3/MISO1/MAT1.3-53rd pin

I/O             P0.18 — General purpose input/output digital pin (GPIO).

I                   CAP1.3 — Capture input for Timer 1, channel 3.

I/O              MISO1 — Master In Slave Out for SSP. Data input to SPI master or data output from SSP slave.

O                  MAT1.3 — Match output for Timer 1, channel 3.

P0.19/MAT1.2/MOSI1/CAP1.2-54th pin

I/O              P0.19 — General purpose input/output digital pin (GPIO).

O                  MAT1.2 — Match output for Timer 1, channel 2.

I/O              MOSI1 — Master Out Slave In for SSP. Data output from SSP master or data input to SSP slave.

I                   CAP1.2 — Capture input for Timer 1, channel 2.

P0.20/MAT1.3/SSEL1/EINT3-55th pin

I/O              P0.20 — General purpose input/output digital pin (GPIO).

O                  MAT1.3 — Match output for Timer 1, channel 3.

I                    SSEL1 — Slave Select for SSP. Selects the SSP interface as a slave.

I                    EINT3 — External interrupt 3 input.

P0.21/PWM5/AD1.6/CAP1.3-1st pin

I/O               P0.21 — General purpose input/output digital pin (GPIO).

O                   PWM5 — Pulse Width Modulator output 5.

I                     AD1.6 — ADC 1, input 6. Available in LPC2144/46/48 only.

I                     CAP1.3 — Capture input for Timer 1, channel 3.

P0.22/AD1.7/CAP0.0/MAT0.0-2nd pin

I/O                P0.22 — General purpose input/output digital pin (GPIO).

I                     AD1.7 — ADC 1, input 7. Available in LPC2144/46/48 only.

I                     CAP0.0 — Capture input for Timer 0, channel 0.

O                    MAT0.0 — Match output for Timer 0, channel 0.

P0.23/VBUS -58th pin

I/O                 P0.23 — General purpose input/output digital pin (GPIO).

I                      VBUS — Indicates the presence of USB bus power.

Note: This signal must be HIGH for USB reset to occur.

P0.25/AD0.4/AOUT-9th pin

I/O                P0.25 — General purpose input/output digital pin (GPIO).

I                     AD0.4 — ADC 0, input 4.

O                    AOUT — DAC output. Available in LPC2142/44/46/48 only.

P0.28/AD0.1/CAP0.2/MAT0.2-13th pin

I/O                P0.28 — General purpose input/output digital pin (GPIO).

I                     AD0.1 — ADC 0, input 1.

I                     CAP0.2 — Capture input for Timer 0, channel 2.

O                    MAT0.2 — Match output for Timer 0, channel 2.

P0.29/AD0.2/CAP0.3/MAT0.3-14th pin

I/O                P0.29 — General purpose input/output digital pin (GPIO).

I                     AD0.2 — ADC 0, input 2.

I                     CAP0.3 — Capture input for Timer 0, channel 3.

O                    MAT0.3 — Match output for Timer 0, channel 3.

P0.30/AD0.3/EINT3/CAP0.0-15th pin

I/O                 P0.30 — General purpose input/output digital pin (GPIO).

I                      AD0.3 — ADC 0, input 3.

I                       EINT3 — External interrupt 3 input.

I                       CAP0.0 — Capture input for Timer 0, channel 0.

P0.31/UP_LED/CONNECT-17th pin

O                      P0.31 — General purpose output only digital pin (GPO).

O                       UP_LED — USB Good Link LED indicator. It is LOW when device is configured (non-control endpoints enabled). It is HIGH when the device is not configured or during global suspend.

O                        CONNECT — Signal used to switch an external 1.5 kW resistor under the software control. Used with the Soft Connect USB feature.

Important: This is an digital output only pin. This pin MUST NOT be externally pulled LOW when RESET pin is LOW or the JTAG port will be disabled.


Port 1

Port 1 is a 32-bit bidirectional I/O port with individual direction controls for each bit. The operation of port 1 pins depends upon the pin function selected via the pin connect block. Pins 0 through 15 of port 1 are not available.

P1.16/TRACEPKT0-16th pin

I/O                   P1.16 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                      TRACEPKT0 — Trace Packet, bit 0.

P1.17/TRACEPKT1-12th pin

I/O                 P1.17 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                     TRACEPKT1 — Trace Packet, bit 1.

P1.18/TRACEPKT2-8th pin

I/O                  P1.18 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                     TRACEPKT2 — Trace Packet, bit 2.

P1.19/TRACEPKT3-4th pin

I/O                  P1.19 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                     TRACEPKT3 — Trace Packet, bit 3.

P1.20/TRACESYNC-48th pin

I/O                  P1.20 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                     TRACESYNC — Trace Synchronization.

Note: LOW on this pin while RESET is LOW enables pins P1.25:16 to operate as Trace port after reset.

P1.21/PIPESTAT0-44th pin

I/O                  P1.21 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                     PIPESTAT0 — Pipeline Status, bit 0.

P1.22/PIPESTAT1-40th pin

I/O                   P1.22 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                      PIPESTAT1 — Pipeline Status, bit 1.

P1.23/PIPESTAT2-36th pin

I/O                   P1.23 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                       PIPESTAT2 — Pipeline Status, bit 2.

P1.24/TRACECLK-32nd pin

I/O                   P1.24 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

O                      TRACECLK — Trace Clock.

P1.25/EXTIN0 -28th pin

I/O                  P1.25 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up.

I                       EXTIN0 — External Trigger Input.

P1.26/RTCK -24th pin

I/O                  P1.26 — General purpose input/output digital pin (GPIO).

I/O                   RTCK — Returned Test Clock output. Extra signal added to the JTAG port. Assists debugger synchronization when processor frequency varies. Bidirectional pin with internal pull-up.

Note: LOW on RTCK while RESET is LOW enables pins P1.31:26 to operate as Debug port after reset.

P1.27/TDO-64th pin

I/O                   P1.27 — General purpose input/output digital pin (GPIO).

O                      TDO — Test Data out for JTAG interface.

P1.28/TDI -60th pin

I/O                    P1.28 — General purpose input/output digital pin (GPIO).

I                         TDI — Test Data in for JTAG interface

P1.29/TCK -56th pin

I/O                    P1.29 — General purpose input/output digital pin (GPIO).

I                         TCK — Test Clock for JTAG interface. This clock must be slower than 1¤6 of the CPU clock (CCLK) for the JTAG interface to operate

P1.30/TMS 52nd pin

I/O                      P1.30 — General purpose input/output digital pin (GPIO).

I                            TMS — Test Mode Select for JTAG interface.

P1.31/TRST-20th pin

I/O                       P1.31 — General purpose input/output digital pin (GPIO).

I                             TRST — Test Reset for JTAG interface.


Other Pins

D+ -10th pin

I/O USB bidirectional D+ line.

D–11th pin

I/O USB bidirectional D- line.

RESET- 57th pin

I External reset input: A LOW on this pin resets the device, causing I/O ports and peripherals to take on their default states, and processor execution to begin at address 0. TTL with hysteresis, 5 V tolerant.

XTAL1 -62nd pin

I Input to the oscillator circuit and internal clock generator circuits.

XTAL2- 61st pin

O Output from the oscillator amplifier.

RTCX1 -3rd pin

I Input to the RTC oscillator circuit.

RTCX2 -5th pin

O Output from the RTC oscillator circuit.

VSS- 6, 18, 25, 42,50th pins

I Ground: 0 V reference

VSSA -59th pin

I Analog ground: 0 V reference. This should nominally be the same voltage as VSS, but should be isolated to minimize noise and error.

VDD -23, 43, 51st pins

I 3.3 V power supply: This is the power supply voltage for the core and I/O ports.

VDDA -7th pin

I Analog 3.3 V power supply: This should be nominally the same voltage as VDD but should be isolated to minimize noise and error. This voltage is only used to power the on-chip ADC(s) and DAC.

VREF -63rd pin

I ADC reference voltage: This should be nominally less than or equal to the VDD voltage but should be isolated to minimize noise and error. Level on this pin is used as a reference for ADC(s) and DAC.

VBAT- 49th pin

I RTC power supply voltage: 3.3 V on this pin supplies the power to the RTC.

 

If you have any doubt pleas ask us. In our next tutorial we will see GPIO of LPC2148.


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